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'Illegal instruction' when cross compiling 4 MIPS
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'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8733

  • Yuliyan Ivanov
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Hi there!

I'm trying to cross compile a program as simple as writeln('Hello'); on Ubuntu host for Linux MIPS target. Тhe target computer is a TP-LINK TL-MR3020 router with OpenWrt Chaos Calmer 15.05.
The resulting binary is giving me an 'Illegal instruction' message when started.

My suggestion is that something got messed up when making the cross element for linux-mips in CT, since I'm using OpenWrt which is a buildroot uClibc linux environment. Anyway, the illegal instruction message is alarming.

Please, advice on appropriate steps to cross compile a runnable FPC program for 'mips-buildroot-linux-uclibc' target. Thank you!

full command line options are as follows:
-Tlinux -Pmips -CpMIPS32 -MObjFPC -Scghi -Os1 -l -vewnhibq -Filib/mips-linux -Fu. -FUlib/mips-linux -XP/home/alpi/buildroot-2015.11.1/output/host/usr/bin/mips-buildroot-linux-uclibc-  -Cb -CfSOFT -CpMIPS32 -Xt

and the compiler executable is:
/usr/local/codetyphon/fpc/fpc64/bin/x86_64-linux/ppcrossmips

The target /proc/cpuinfo:
root@OpenWrt:/# cat /proc/cpuinfo
system type             : Atheros AR9330 rev 1
machine                 : TP-LINK TL-MR3020
processor               : 0
cpu model               : MIPS 24Kc V7.4
BogoMIPS                : 265.42
wait instruction        : yes
microsecond timers      : yes
tlb_entries             : 16
extra interrupt vector  : yes
hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
isa                     : mips1 mips2 mips32r1 mips32r2
ASEs implemented        : mips16
shadow register sets    : 1
kscratch registers      : 0
package                 : 0
core                    : 0
VCED exceptions         : not available
VCEI exceptions         : not available

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'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8756

  • Yuliyan Ivanov
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Running it with debugger, here is the result:
(gdb) disassemble
Dump of assembler code for function SYSTEM_$$_GET_FSR$$LONGWORD:
=> 0x00400524 <+0>:     cfc1    v0,c1_fcsr
   0x00400528 <+4>:     jr      ra
   0x0040052c <+8>:     nop
End of assembler dump.
(gdb) info stack
#0  0x00400524 in SYSTEM_$$_GET_FSR$$LONGWORD ()
#1  0x00401910 in SYSTEM_$$_SYSINITFPU ()
#2  0x0040199c in SYSTEM_$$_FPC_CPUINIT ()
#3  0x00423d9c in fpc_initializeunits ()
#4  0x0040019c in main () at p1.lpr:3

My target CPU has no FPU, perhaps here is the problem. Please advice where to configure the RTL build in appropriate way to work with soft-FPU. I'm not very familiar with the CT cross-build system. Thank you!

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'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8757

  • Sternas Stefanos
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Sir, did you have custom toolchains for this target ?
or
you want to build and toolchains for this target
PilotLogic Architect and Core Programmer

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Last edit: by Sternas Stefanos.

'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8758

  • Yuliyan Ivanov
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I have already built the toolchain and the 'elements' with the help of 'CodeTyphon GNU Toolchains Builder' with final toolchains engine parameters of 'lin64 x86_64-linux xxxx mips linux xxxx xxxx'.
CrossBuild settings are with both engines enabled.
And I'm using it as you can see in my original post.
Also I have at hand a buildroot environment with a target gdbserver executable and the corresponding host gdb executable.

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'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8759

  • Sternas Stefanos
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In CodeTyphon you can make:

a) Custom Cross_Binutils
Cross_Binutils_CPUXX_OSXX_OTHERXX
like codetyphon/ScriptsLin/crossbuild/ln_Cross_Binutils_arm_embedded.sh
to build the target toolchain

b) Custom Build_Element
FPCx_Build_Element__CPUXX_OSXX_OTHERXX
like codetyphon/ScriptsLin/crossbuild/ln_FPCx_Build_Element_arm_embedded.sh
to build target FPC element

Sir, this is a subject of the highest programming level.
Before I continue, I want to know,
if you have any experience with binutils and gcc cross-build methodology ?
PilotLogic Architect and Core Programmer

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Last edit: by Sternas Stefanos.

'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8760

  • Yuliyan Ivanov
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Yes, my work is primary cross-development for embedded systems, most of the toolchains are based on gcc. Though I'm not very experienced with the MIPS arch.

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'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8761

  • Sternas Stefanos
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Sir
me too, I don't have experience with
mipsel-embedded or
mips-embedded

I will ask tomorrow my Lab team and I hope to find a solution.
My suggestion is to ask and Free-Pascal programmers
PilotLogic Architect and Core Programmer

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Last edit: by Sternas Stefanos.

'Illegal instruction' when cross compiling 4 MIPS 8 years 4 months ago #8762

  • Yuliyan Ivanov
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Just FYI, my idea is to use the TP-Link TL-MR3020 with OpenWrt as a tiny networked node for my inhouse project. It will be lot easier for me to work with FPC than GCC since I have the corresponding software infrastructure (framework, libraries, etc.), at least the idea is very tempting ;)

Best regards,
Yuliyan

Edit:

I've made a breakdown of options from the output of the CT toolchain/element builder. It looks like this:

for the assembly command
mips-linux-as -32 -mabi=32 -mips2 -EB -KPIC -o /usr/local/codetyphon/fpcsrc/rtl/units/mips-linux/prt0.o mips/prt0.as
with options:
-32 // create o32 ABI object file (default) 
-mabi=32 // create ABI conformant object file for: 32
-mips2 // generate MIPS ISA II instructions
-EB // generate big endian output
-KPIC // generate SVR4 position independent code
-o /usr/local/codetyphon/fpcsrc/rtl/units/mips-linux/prt0.o // output file
mips/prt0.as // input file

for the pascal compiler
/usr/local/codetyphon/fpc/fpc64/bin/x86_64-linux/ppcrossmips -Ur -Pmips -XPmips-linux- -Xr -Ur -Xs -O2 -n -Fi../inc -Fi../mips -Fi../unix -Fimips -FE. -FU/usr/local/codetyphon/fpcsrc/rtl/units/mips-linux -Cg -dmips -dRELEASE -Us -Sg system.pp
with options
-Ur // Generate release unit files (never automatically recompiled)
-Pmips // Set target CPU (mips)
-XPmips-linux- // Prepend the binutils names with the prefix <x>
-Xr // Set the linker's rlink-path to <x> ?
-Ur // Generate release unit files (never automatically recompiled), 2nd time?
-Xs // Strip all symbols from executable
-O2 // Level 2 optimizations (-O1 + quick optimizations)
-n // Do not read the default config files
-Fi../inc // Add <x> to include path
-Fi../mips // Add <x> to include path
-Fi../unix // Add <x> to include path
-Fimips // Add <x> to include path
-FE. // Add <x> to include path
-FU/usr/local/codetyphon/fpcsrc/rtl/units/mips-linux 
-Cg // Generate PIC code
-dmips // Defines the symbol <x>
-dRELEASE // Defines the symbol <x>
-Us // Compile a system unit
-Sg // Enable LABEL and GOTO
system.pp // input file

Things that should be fixed:
  1. -mips2 for the as, it must be -mips32 IMHO
  2. -Cb -CpMIPS32 -CfSOFT -dFPUNONE (and maybe other relevant defines) for the ppcrossmips

My problem is that I can't figure from where all these options came from and how to manipulate them accordingly.

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Last edit: by Yuliyan Ivanov.
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'Illegal instruction' when cross compiling 4 MIPS